1. Technical Field
The present invention relates to the field of dangling reference detection and garbage collection, more particularly, to dangling access values and garbage collection of objects in a simulation environment.
2. Description of the Related Art
A logic simulator is a software tool, which is capable of performing functional and timing simulations for digital electronic designs which are written in a hardware description language such as Very High Speed Integrated Circuit Hardware Description Language (VHDL) or Verilog. VHDL, for example, permits hardware designers to define signals at a very high level of abstraction. The abstracted signal representations can be translated to actual pins on a microchip using any of a variety of commercial electronic design automation (EDA) software tools.
VHDL provides a measure of flexibility by allowing hardware designers to declare signals of various user-defined types. A user-defined type can either be a scalar or a composite type. Scalars further can be subdivided into four different types, namely enumeration, integer, floating point, and physical. Composites, however, can be subdivided into two types: arrays and records. Still, other defined types include access types and file types.
Scalar and composite types are generally used to represent either single data items or regular collections of data. In some applications such as simulation programs, collections of data of unknown size might need to be stored. Scalar and composite types are insufficient when data objects need to be created as required during a simulation and where links between the data objects need to be represented. In VHDL, access types are primarily used for this function.
In VHDL, access types are used mainly in high-level behavioral models. Access types support dynamic allocation of objects, which is very useful for writing testbenches. An access type in VHDL is like a pointer type found in many programming languages. An access value is like a pointer in VHDL, which points to a dynamically allocated object in VHDL. In VHDL, unlike high level programming languages like C++, an access value can only point to a dynamically allocated object. In particular it can not point to an object created by an object declaration such as a variable declaration.
Although several garbage collecting techniques are known and used by high level programming languages such as JAVA and C++ or in operating systems, such existing techniques will be either inefficient or would render many runtime applications useless in practical terms when used in an HDL Simulation environment. For example, the existing techniques for garbage collecting would utilize excessive amounts of CPU resources to allow a simulation program to operate effectively.
Thus, a technique and system is needed in simulation programs and other programs that efficiently detects dangling references as well as memory leaks and efficiently performs garbage collection of objects.